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July 16, 2007
Southbridge
The Southbridge, also known as the I/O Controller Hub (ICH), is a chip that implements the "slower" capabilities of the motherboard in a northbridge/southbridge chipset computer architecture. The southbridge can usually be distinguished from the northbridge by not being directly connected to the CPU. Rather, the northbridge ties the southbridge to the CPU.
Because the southbridge is further removed from the CPU, it is given responsibility for the slower devices on a typical microcomputer. A particular southbridge will usually work with several different northbridges, but these two chips must be designed to work together; there is no industry-wide standard for interoperability between different core logic chipset designs. Traditionally this interface between northbridge and southbridge was simply the PCI bus, however since this created a performance bottleneck, most current chipsets use a different (often proprietary) interface with higher performance.

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