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In computers, the front side bus (FSB) or system bus is the physical bi-directional data bus that carries all electronic signal information between the central processing unit (CPU) and the northbridge. Some computers also have a back side bus which connects the CPU to a memory cache. This bus and the cache memory connected to it are faster than accessing the system RAM via the front side bus.
The maximum theoretical bandwidth of the front side bus is determined by the product of its width, its clock frequency and the number of data transfers it performs per clock tick. For example, a 32-bit (4-byte) wide FSB with a frequency of 100 MHz that performs 4 transfers/tick has a maximum bandwidth of 1600 MB/second. The number of transfers per tick is dependent on the technology used, with (for example) GTL+ offering 2 transfers/tick, EV6 4 transfers/tick, and AGTL+ 8 transfers/tick.

Related Component Speeds

• CPU
The frequency at which a processor (CPU) operates is determined by applying a clock multiplier to the front side bus (FSB) speed. For example, a processor running at 550 MHz might be using a 100 MHz FSB. This means there is an internal clock multiplier setting (also called bus/core ratio) of 5.5; the CPU is set to run at 5.5 times frequency of the front side bus: 100 MHz × 5.5 = 550 MHz. By varying either the FSB or the multiplier, different CPU speeds can be achieved.
• Memory
Setting a FSB speed is related directly to the speed grade of memory that a system must use. The memory bus connects the northbridge and RAM, just as the front side bus connects the CPU and northbridge. Often, these two buses must operate at the same frequency. Increasing the front-side bus to 170 MHz means also running the memory at 170 MHz in most cases.
In newer systems, it is possible to see memory ratios of "4:5" and the like. The memory will run 5/4 times as fast as the FSB in this situation, meaning a 133 MHz bus can run with the memory at 166 MHz. This is often referred to as an 'asynchronous' system. It is important to realize that, due to differences in CPU and system architecture, overall system performance can vary in unexpected ways with different FSB-to-memory ratios.
In complex image, audio, video, gaming, and scientific applications where the data set is large, FSB speed becomes a major performance issue. A slow FSB will cause the CPU to spend significant amounts of time waiting for data to arrive from system memory.
• Peripheral Buses
Similar to the memory bus, the PCI and AGP buses can also be run asynchronously from the front side bus. In older systems, these buses operated at a set fraction of the front side bus frequency. This fraction was set by the BIOS. In newer systems the PCI, AGP, and PCI Express peripheral buses often receive their own clock signals, which eliminates their dependence on the front side bus for timing.